1. Field of the Invention
The present invention relates to a digital VCO and, more particularly, to a digital VCO suitable for use in a digital PLL of which capability of changing the output with a fine phase pitch is required.
2. Description of the Prior Art
Generally, in a digital VCO, the frequency of the original signal is divided down and the thus obtained signal is decoded so that a signal with a required phase is obtained. When generating a signal having a required phase in the described manner, the phase which can be obtained is given, with the frequency of the original signal represented by f.sub.0 and the frequency divisor represented by N, by n.pi./N (n=0, 1, . . . 2N-1), that is 2N kinds of phases can be obtained. In the conventional VCO, there has been a disadvantage that the greater the frequency divisor N is, the lower the frequency becomes, or the higher the original signal frequency should be. Thus, the clock frequency should be increased in order to decrease the phase pitch of the output signal, and therefore, a VCO of the described type has not been applicable for example to the color subcarrier signal (3.58 MHz) of the video signal (NTSC) in a television receiver. More specifically, when the phase pitch accuracy is to be raised to 1 degree (0.78 nS), a frequency of 1/0.78 nS.apprxeq.1.3 GHz is required. Since a clock signal with such extremely high frequency becomes necessary, the application has been difficult to be realized.
When an oscillator circuit using a quartz oscillator Xtal is used for the VCO in a PLL, since the variable range is as narrow as the accuracy of the center frequency, adjustment of the center frequency becomes necessary. On the other hand, when an LC oscillation circuit is used for the VCO, there is a possibility of the PLL loop producing pseudo lock-in. If the variable range is narrowed in order to avoid that possibility, then the adjustment of the center frequency becomes necessary for the same reason as described above.